1. Field of the Invention
The present invention relates to the field of display technology, and in particular to a low temperature poly-silicon (LTPS) thin-film transistor (TFT) substrate and a manufacturing method thereof.
2. The Related Arts
Liquid crystal displays (LCDs) have a variety of advantages, such as thin device body, low power consumption, and being free of radiation, and are thus of wide applications, such as mobile phones, personal digital assistants (PDAs), digital cameras, computer monitors, and notebook computer screens.
Most of the liquid crystal displays that are currently available in the market are backlighting liquid crystal displays, which comprise an enclosure, a liquid crystal panel arranged in the enclosure, and a backlight module mounted in the enclosure. The structure of a conventional liquid crystal panel is made up of a color filter (CF) substrate, a thin-film transistor (TFT) array substrate, and a liquid crystal layer arranged between the two substrates and the principle of operation is that a driving voltage is applied to the two glass substrates to control rotation of the liquid crystal molecules of the liquid crystal layer in order to refract out light emitting from the backlight module to generate an image.
The LTPS technology is a manufacturing technique for a new generation TFT substrate. Compared to the traditional amorphous silicon (a-Si) technology, the LTPS displays have a faster response speed and show various advantages including high brightness, high resolution, and low power consumption. For the LTPS technology, the one that is most commonly used by most of the major manufacturers is the top gate LTPS TFT substrate. However, the top gate LTPS TFT substrate is often additionally provided with a light-shielding metal layer on a bottom of a TFT device located in an active area in order to prevent the influence caused by a leakage current resulting from light irradiation. This increases the manufacturing cost of the LTPS TFT substrates. This implies the development of bottom gate LTPS TFT substrates would be of significant meaning in the respect of saving cost and increasing throughput.
Referring to FIG. 1, a cross-sectional view is given to illustrate the structure of a conventional bottom gate LTPS TFT substrate, which comprises a base plate 100, a gate electrode 200 formed on the base plate 100, a gate insulation layer 300 formed on the substrate 100 and the gate electrode 200, a poly-silicon layer 400 formed on the gate insulation layer 300, and a source electrode 500 and a drain electrode 600 formed on the gate insulation layer 300 and the poly-silicon layer 400. The poly-silicon layer 400 comprises source/drain contact zones 410 located at two sides thereof and respectively in engagement with the source electrode 500 and the drain electrode 600, a channel zone 420 located at a center of the poly-silicon layer 400, and lightly doped drain (LDD) zones 430 respectively located between the source/drain contact zones 410 and the channel zone 420. In such a process of manufacturing the LTPS TFT substrate, the source/drain contact zone 410, the channel zone 420, and the LDD zones 430 need to be doped separately and such a manufacturing process needs at least two masks, making the operation complicated, the manufacturing efficiency low, and the manufacturing cost high.
Thus, it is desired to provide a LTPS TFT substrate and a manufacturing method thereof that help overcome the above-discussed problems.